306 lines
10 KiB
Markdown
306 lines
10 KiB
Markdown
# Cardiograph computers
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The Cardiographs are a pair of imaginary computers,
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designed as educational toys.
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Inspired by the CARDIAC paper computer,
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they are intended to be simple enough to build as
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hand-operated paper models.
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Their design is guided by two additional criteria:
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1. They should be capable of producing interesting graphical output
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2. They should accurately model the functioning of a real computer
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(by operating on binary data, for example)
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## The two computers
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The two Cardiograph computers are:
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1. the _Cardiograph Mark I_ (CG) is a mainframe machine
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2. the _Micro Cardiograph_ (µCG) is a microprocessor trainer
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(a miniaturized descendent of the mainframe)
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They use the same instruction set and have very similar CPUs. (TODO: is that true?)
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The main difference is in their peripheral hardware:
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the Mark I is designed for batch processing and supports punched-card input,
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while the MicroCardiograph is designed to be used interactively.
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## Simulator
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_[Micro ElectroCardiograph (µECG)](micro/readme-micro.md)_ is a simulator for the Micro Cardiograph.
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## CPU
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### Registers
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There are four 8-bit registers:
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1. **A**, the accumulator (and the only general-purpose register)
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2. **IP**, the instruction pointer (aka program counter)
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3. **IOD**, the ID of the current I/O device
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3. **Status**
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#### Status register
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The *high byte* holds the state of the four Sense Switches. (TODO: is this easy enough to do in hardware?)
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The *low byte* holds four flags:
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**O**verflow, **N**egative, **Z**ero, and **C**arry.
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These are all addressed by number:*
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| S1 | S2 | S3 | S4 | | O | N | Z | C |
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|----|----|----|----|-|----|----|----|----|
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| 80 | 40 | 20 | 10 | | 08 | 04 | 02 | 01 |
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* (Because the core instruction set doesn't include bitwise operations)
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### Instruction set
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- Instructions are two bytes long:
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one byte for the opcode, one for the operand
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<mark>TODO: revise this based on note dated 2023-09-24</mark>
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```GGMM IIII``` - **G**roup, **M**ode, **I**nstruction
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| lo ↓ / hi → | 0 (G0, M0) | 5 (G1, M1) | 6 (G1, M2) | 9 (G2, M1) | A (G2, M2) | F (G3, M3) |
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|-------------|------------|------------|------------|------------|------------|------------|
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| **0** | END | LDA # | LDA ind | DEV # | DEV ind | |
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| **1** | NOP | STO # | STO ind | INP # | INP ind | |
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| **2** | | ADD # | ADD ind | OUT # | OUT ind | |
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| **3** | | SUB # | SUB ind | FED | FED | |
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| **4** | | JMP # | JMP ind | | | |
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| **5** | | JEQ # | JEQ ind | | | |
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| **6** | | JFL # | JFL ind | | | |
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| **7** | | FTG # | FTG ind | | | |
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| | | | | | | |
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| **8** | | MUL # | MUL ind | | | RSL A |
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| **9** | | DIV # | DIV ind | | | RSR A |
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| **A** | | JLT # | JLT # | | | ASL A |
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| **B** | | JGT # | JGT # | | | ASR A |
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| **C** | | NOT # | NOT # | | | |
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| **D** | | AND # | AND # | | | |
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| **E** | | OR # | OR # | | | |
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| **F** | | XOR # | XOR # | | | |
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TODO: assess JMPs vs. HOPs
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- RSL/RSR: Ring Shift Left/Right
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- JLT/JGT: Jump Less/Greater Than
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- DEV: select IO device
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- FED: "feed" - line feed / end of card
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TODO: format/document better:
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1. core computational operations: low nibbles of 0x, 5x, 6x
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2. arithmetic extension (optional): MUL, DIV
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3. IO extension (optional): 9x, Ax
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4. bitwise arithmetic extension (optional): NOT, AND, OR, XOR and RSL, RSR, ASL, ASR
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5. control flow extension (optional): JLT, JGT
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- The mainframe system implements at least 1, 2, and 3
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- The microprocessor trainer implements 1
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- (see note dated 2023-09-24)
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### Connections (pinout)
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<mark>TBC</mark>
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| name | in/out? | description |
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|-----------|---------|---------------|
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| RST | in | *reset* |
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| VCC | in | *power* |
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| GND | in | *ground* |
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| CLK | in | *clock* |
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| A0 - A7 | out | *address bus* |
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| D0 - D7 | out | *data bus* |
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| ABE | out | *address bus enable*: <br> low when the CPU is using the address bus |
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| DBE | out | *data bus enable*: <br> low when the CPU is using the data bus |
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| WAIT | in | *wait* — when pulled low, <br> the current operation is completed <br> and then execution pauses |
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| /RD | out | TODO |
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| /WR | out | |
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| M/IO | out | |
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### Start-up
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<mark>TODO: see if this makes sense for the mainframe </mark>
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When starting up, the CPU executes a `JMP $FF`.
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Put differently: it starts executing instructions at the address contained in `$FF`.
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<mark>TODO: currently the simulator doesn't actually do this</mark>
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## Cardiograph Mark I (mainframe)
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The components of a Mark I are:
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- an CG 101 Central Processing Unit
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- an CG 102 Core Memory Unit
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- an CG 103 Print-Key-Punch
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- an CG 104 Matrix Display
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### Console
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<mark>TBC TBC TBC</mark>
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The console is equipped with:
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- Power switch
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- Load button
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- Run button
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- Run Single Step button
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- Halt button
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- Memory Read button
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- Memory Read Next button
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- Memory Write button
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- Memory Write Next button
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- 4 Sense Switches
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- 8 Accumulator lights
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- 8 Address lights
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- 8 Data lights
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- 8 Instruction Pointer lights (<mark>review IP size?</mark>)
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- 8 Status Register lights
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## IO programming
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Only one input or output device can be accessed at a time.
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### Reading data
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1. Use `DEV xx` to select input device _xx_
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2. Use `INP yy` to read one byte into memory at address _yy_
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<mark>TODO: find a way to allow the input device to refuse to provide input</mark>
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### Writing data
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1. Use `DEV xx` to select output device _xx_
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2. Use `OUT yy` to write one byte from memory at address _yy_
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3. Use `FED xx` to...
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- card punch: load a new card
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- printer: begin a new line (CR, LF)
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- display: begin a new line
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### Punched card format
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FIXME:
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- ~~Cards are punched in EBCDIC~~
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- ~~EBCDIC data is translated into binary by the card reader/punch~~
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- Only columns 1-64 are used (for a maximum of 64 bytes of data per card)
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### Printer format
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- The printer format is the same as the card format
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- One line of printing is equivalent to one card
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- The printer can print up to 64 characters per line
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### Matrix display format
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- The display is a 5x5 grid of lights
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- Each light has 16 possible brightness levels (0 = off, 15 = maximum)
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- The display is written one line at a time
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- After the display is selected with `DEV`, writing begins on the top line
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- Writing wraps around and begins at the top again, if more than 5 lines are written
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### Device numbers
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1. card reader / typewriter
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2. card punch / line printer
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3. display
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### Print-Key-Punch configurations
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A dial allows you to select which input device to connect to the CPU:
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1. none
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2. card reader
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3. keyboard
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A similar dial selects the output device to connect:
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1. none
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2. card punch
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3. printer
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Thus, this all-in-one device allows the following configurations:
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| | printer | card punch | none |
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|-----------------|----------------------|------------------|--------------------------|
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| **keyboard** | ***teletypewriter*** | ***auto punch*** | ***keypunch (offline)*** |
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| **card reader** | (keys + print) | card duplicator | (card reader) |
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| **none** | line printer | (auto punch) | (scrap metal) |
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## MicroCardiograph (microprocessor trainer)
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The MicroCardiograph uses memory-mapped IO.
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### Memory map
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| Address | Used for... |
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|----------|-----------------------------------------------|
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| 00 to 19 | display (5x5) |
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| 1A | pointer to display memory |
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| 1B | keypad: value of latest key pressed |
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| 1C | reserved for future use (bank switching flag) |
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| 1D | initial IP |
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| 1D to FE | free |
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| FF | * ROM (unwriteable) pointer to initial IP |
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\* Not implemented yet
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### Peripherals
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#### Keypad
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The value of the latest keypress on a hex keypad is stored at `$1B`.
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The keypad uses the same layout as the COSMAC VIP (and CHIP-8). The CPU simulator maps those keys onto a Qwerty set:
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`1` `2` `3` `C` = `1` `2` `3` `4`
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`4` `5` `6` `D` = `Q` `W` `E` `R`
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`7` `8` `9` `E` = `A` `S` `D` `F`
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`A` `0` `B` `F` = `Z` `X` `C` `V`
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The arrow keys are also mapped onto the hex keypad:
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` ` `5` ` ` = ` ` `↑` ` `
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`7` `8` `9` = `←` `↓` `→`
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## Assembly language
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ADD $01 ; comments follow a `;`
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ADD $FF ; this is direct addressing
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ADD ($CC) ; this is indirect addressing
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END ; END and NOP don't require operands
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; (the assembler will fill in a default value of 0)
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@subroutine ; create a label
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ADD $01 ; (it must be on the line before the code it names)
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ADD $02
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JMP @subroutine ; use a label as operand
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; the label will be replaced with
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; the address of the label
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#foo $FF ; define a constant
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; (must be defined before it is referenced)
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ADD #foo ; use a constant as an operand
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LDA * ; `*` is a special label referencing the memory address
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; where the current line will be stored after assembly
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- Prefix hexadecimal numbers with `$` (or `0x`)
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- Prefix binary numbers with `0b`
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- Whitespace is ignored |