2.8 KiB
2023-09-22 — Dev notes
How did DMA work on the PDP-8?
https://gunkies.org/wiki/PDP-8_architecture:
All supported DMA, called "data break" in the PDP-8's. There were two types. In one, "three cycle data break", the buffer address and word count were kept in main memory (at an address usually specified by jumpers on the device). This required the assistance of the processor, placing the processor in charge of maintaining the DMA address and word count. This moved some of common logic (needed to implement the I/O device) from each I/O device into one common copy of the logic within the processor, reducing the device complexity (and thus cost). In three successive memory cycles, the processor would update the word count, update the transfer address, and finally store or retrieve the actual I/O data word. The other, "single cycle data break", moved back to the individual I/O devices all the responsibility for maintaining the word count and transfer address (in registers in the device); this effectively tripled the DMA transfer rate because only the target data needed to be transferred to/from the main memory.
- here's an overview of the PDP-8 Another Real Machine: The DEC PDP-8
How did DMA/memory access work on the IBM 709?
1958 IBM 709 – First Use of DMA
DMA did exist in two military systems prior to these commercial machines. Smotherman notes:
“The DYSEAC also appears to be the first computer to provide DMA, although IBM was granted a patent for DMA cycle-stealing on the SAGE system (US 3,319,230 Astrahan, et al., ‘Data Processing Machine Including Program Interrupt Feature,’ filed Sept. 1956 and granted May 1967). (The SAGE project started in 1952, and I cannot yet determine the date of the first use of DMA in the design.)”
IBM developed a buffered I/O system on its 709 computer, in which data channels attached to the memory could perform I/O at the same time as the processor was doing computation. The first 709 was delivered in late summer 1958.
Whether interrupts are a necessary feature of DMA I/O may be subject to debate and I argue they aren’t as the 709 did not have interrupts. It doesn’t matter if the I/O DMA address was part of the CPU logic or part of the peripheral controller in order to qualify.
IBM 709 — more material
http://sky-visions.com/ibm/ibm709_instr.shtml
http://www.piercefuller.com/collect/main.html
http://www.piercefuller.com/library/ibm709diagrams.html
http://www.piercefuller.com/collect/709dwg/index.html
https://ed-thelen.org/comp-hist/BRL61-ibm0709.html
https://www.computer-history.info/Page4.dir/pages/IBM.7090.dir/index.html