265 lines
9.9 KiB
Markdown
265 lines
9.9 KiB
Markdown
# Dev notes — 2023-09-03
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## Todos
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- [ ] add yesterday’s reading to dev notes
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- chip8 stuff
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- js stuff
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- [x] reconsider revised ISA
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- + a more-binary simulator
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- [ ] set up semi-standard js eslint
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- remember: meowbit
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## Misc. references
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TODO: organize these
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- [Assembly in One Step](https://dwheeler.com/6502/oneelkruns/asm1step.html)
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- [How to write an emulator (CHIP-8 interpreterhttp://www.emulator101.com/6502-addressing-modes.html)](https://web.archive.org/web/20180121070101/http://www.multigesture.net/articles/how-to-write-an-emulator-chip-8-interpreter/)
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- http://www.cosmacelf.com/publications/books/cosmac-elf-manual.pdf
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- http://archive.6502.org/datasheets/wdc_w65c02s_mar_2000.pdf
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- Weisbecker, Joseph, "[Build The COSMAC "ELF" A Low-Cost Experimenter's Microcomputer](http://www.exemark.com/Microcontrollers/PopularElecwebc.pdf)" (re-typed PDF)
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- [The UNO1802: A Cosmac Elf for $13 in parts...](http://obsolescenceguaranteed.blogspot.com/2017/08/the-uno1802-cosmac-elf-for-15-in-parts.html)
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- [Understanding the MAR and the MDR](https://web.archive.org/web/20170328171842/http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Overall/mar.html)
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From earlier:
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- [How does a microcontroller boot and startup, step by step?](https://electronics.stackexchange.com/questions/224156/how-does-a-microcontroller-boot-and-startup-step-by-step)
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- http://www.6502.org
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- [6502 PRIMER: Building your own 6502 computer](http://wilsonminesco.com/6502primer/index.html)
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- http://visual6502.org/JSSim/
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- [KIM-1 Microcomputer Module User Manual](http://retro.hansotten.nl/uploads/6502docs/usrman.htm) (HTML version)
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- [How does a DMA controller work?](https://softwareengineering.stackexchange.com/questions/272470/how-does-a-dma-controller-work)
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- [Photo of a KIM-1](http://retro.hansotten.nl/wp-content/uploads/2020/11/20201106_131253a-1-scaled.jpg)
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- [Punched Cards & Paper Tape](https://www.computerhistory.org/revolution/memory-storage/8/326)
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- [Semyon Korsakov](https://en.wikipedia.org/wiki/Semyon_Korsakov)
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- [Punched Card Input/Output Devices](http://www.ibm1130.net/functional/Cards.html)
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- [IBM Punched Card Stock Specifications](https://ibm1401.computerhistory.org/CardStockSpecifications.html)
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- [The IBM 029 Key Punch](http://www.columbia.edu/cu/computinghistory/029.html)
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- http://retro.hansotten.nl/6502-sbc/kim-1-manuals-and-software/kim-1-simulator/
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- https://craftinginterpreters.com/a-map-of-the-territory.html
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- "2023-08-10 cardiograph reference" tab group:
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- [Inside the vintage 74181 ALU chip: how it works and why it's so strange](www.righto.com/2017/03/inside-vintage-74181-alu-chip-how-it.html?m=1)
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- [Software woven into wire: Core rope and the Apollo Guidance Computer](www.righto.com/2019/07/software-woven-into-wire-core-rope-and.html?m=0)
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- [Arithmetic logic unit - Wikipedia](en.m.wikipedia.org/wiki/Arithmetic_logic_unit)
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- [29c05c9d7985b673e98f32fbf43ae628.jpg 1,960×2,014 pixels](i.pinimg.com/originals/29/c0/5c/29c05c9d7985b673e98f32fbf43ae628.jpg)
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- [My First Program — ICL CES - Computer Education in Schools](iclces.uk/articles/first_cesil_program.html)
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- [CSIRO Computing History Appendix 7: CSIRO Computing Museum / Artefacts – CSIROpedia](csiropedia.csiro.au/csiro-computing-history-appendix-7-artefacts/)
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- [CHIP-8 in Common Lisp: Input / Steve Losh](stevelosh.com/blog/2016/12/chip8-input/)
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- [CHIP-8 virtual machine specification](tonisagrista.com/blog/2021/chip8-spec/)
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- [Table of Contents - by Casey Muratori - Computer, Enhance!](www.computerenhance.com/p/table-of-contents)
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- [Turing Complete](turingcomplete.game/)
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- [6502 Registers](web.archive.org/web/20210626024532/http://www.obelisk.me.uk/6502/registers.html)
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- [Easy 6502 by skilldrick](skilldrick.github.io/easy6502/)
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- [bitsavers.org](www.bitsavers.org/components/rca/cosmac/COSMAC_VIP_Instruction_Manual_1978.pdf)
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- [COSMAC Elf 2000](www.sparetimegizmos.com/Hardware/Elf2K.htm)
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- [A Short Course In Programming by Tom Pittman | COSMAC ELF](www.cosmacelf.com/publications/books/short-course-in-programming.html)
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- [A Short Course In Programming](www.ittybittycomputers.com/IttyBitty/ShortCor.htm)
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- [exemark.com](www.exemark.com/Microcontrollers/PopularElecwebc.pdf)
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- [Build The COSMAC "ELF" Part 1](billr.incolor.com/elf/html/elf-1-33.htm)
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- [GitHub - tebl/RC1802-Cosmac-ELF: With the RC6502-project for making an Apple 1 replica done I wanted to do something different, so I started designing a simple version of the RCA 1802-based Cosmac ELF instead.](github.com/tebl/RC1802-Cosmac-ELF)
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- [More musings of computers past: Popular Electronics, the COSMAC ELF | brainwagon](brainwagon.org/2014/07/27/more-musings-of-computers-past-popular-electronics-the-cosmac-elf/)
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## Startup: correction
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It doesn’t execute “JMP $FF.” It just sets the IP to $FF on reset, and you put a JMP there in ROM.
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- [ ] TODO: update docs elsewhere
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## Detailed CPU design/low-level simulator
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### Revising ISA
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[See notes from 2023-08-23](2023-08-23.md)
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### Instruction cycle
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**For now, treat each instruction as taking one cycle.**
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I started making notes on this, which I am leaving below… but this doesn’t seem useful at this point so I’m forgetting about it for now.
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- references
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- [Understanding the MAR and the MDR](https://web.archive.org/web/20170328171842/http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Overall/mar.html)
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- https://en.wikipedia.org/wiki/Three-state_logic
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* 1 cycle - fetch
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* copy IP to MAR
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* send Read command on memory control line
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* copy data from data bus to instruction register
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* calculate next IP (if no branch); IP += 2
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* 1 cycle - decode
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* (i think:) split instruction data into addressing mode, op, data
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* calculate branch target
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* 2 cycles - execute
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* 1 cycle - memory read
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* 1 cycle - compute
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* 1 cycle - write back
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### Sketch in JS
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TODO:
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- [ ] Figure out how to do DMA
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- [ ] Learn more about how the 1802 does DMA
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- http://www.cosmacelf.com/publications/books/cosmac-elf-manual.pdf
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- http://www.exemark.com/Microcontrollers/PopularElecwebc.pdf
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References:
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- 6502 SYNC pin
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- "The SYNC output is provided to identify those cycles during which the microprocessor is fetching an OpCode. The SYNC line goes high during the clock cycle of an opcode fetch and stays high for the entire cycle. If the RDY line is pulled low during the clock cycle in which SYNC went high, the processor will stop in its current state and will remain in the state until the RDY line goes high. In this manner, the SYNC signal can be used to control RDY to cause single instruction execution."
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- -- http://archive.6502.org/datasheets/wdc_w65c02s_mar_2000.pdf
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```
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class CPU {
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constructor (memory, addressBus, dataBus, memoryReadSignal, memoryWriteSignal, cpuWait) {
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this.memory = memory;
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// TODO: move buses etc to this.pins.foo
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this.pins = {
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dataBus : dataBus,
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addressBus : addressBus,
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memoryReadSignal : 0,
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wait : cpuWait, // If 1, execution is paused (cf. 6502 RDY pin)
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// readNotWrite : 0 // 1 if want to read mem // TODO lower level than i need right now?
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}
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this.reset();
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}
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IP = 0;
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A = 0;
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flags = 0b00000000;
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instruction = 0x00;
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//What do I want for interrupts…?
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// interruptRequest = 0;
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// TODO: can it be a simple setup with fixed instruction cycle length pls?
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_instructionCycleStep = 0;
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tickClock () {
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if (this.wait) return false;
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switch (this._instructionCycleStep) {
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// Fetch
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case (0) {
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// this.instruction = this.memory.read(this.IP);
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this.readWriteControl = 1; // TODO
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break;
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} case (1) {
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// initiate read
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this.pins.addressBus = this.IP;
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this.pins.memoryReadSignal = 1;
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} case (2) {
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// complete read
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this.pins.memoryReadSignal = 0;
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this.instruction = this.dataBus;
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}
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// TODO: continue switch statement
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// ...
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/*
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// decode
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const op = this._decode(this.instruction);
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// execute
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op();
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*/
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}
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}
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reset () {
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// this.IP = this.memory.read(0xFF);
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this.IP = 0xFF;
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this.A = 0;
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this.flags = 0b00000000;
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this.pins.dataBus = 0b00000000;
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this._instructionCycleStep = 0;
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this.debug.running = true;
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}
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_decode (instruction) {
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const instrs = {
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0x00: ‘end’,
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// TODO etc
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};
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return instrs[instruction];
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}
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debug = {
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// TODO include the rest of the stuff that I have here in the current version
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running: false,
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}
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}
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```
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```
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class Memory {
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// ROM format: { addr: nn, data: nn }
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constructor (sizeInBytes, ROM, addressBus, dataBus, readSignal, writeSignal) {
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// memory format: [ { data: nn, type: ‘str’ } ]
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this.memory = new Array(sizeInBytes);
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objectForEach(ROM, (byte) => {
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this.memory[byte.addr] = { data: byte[data], type: ‘ROM’ };
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})
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this.pins = {
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addressBus: addressBus,
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dataBus: dataBus,
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readSignal: readSignal,
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writeSignal: writeSignal,
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}
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}
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tickClock () {
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if (this.pins.readSignal) this._read();
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if (this.pins.writeSignal) this._write();
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}
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_read () {
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this.pins.dataBus = this.memory[this.pins.addressBus];
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}
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_write () {
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if (this.memory[this.pins.addressBus].type === ‘ROM’) throw new Error(‘Attempted write to ROM’);
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this.memory[this.pins.addressBus].data = data;
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}
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}
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function objectForEach (object, fn) {
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return Object.keys(object).forEach(key => fn(key, object[key]));
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}
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```
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```
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/** DMA controller for screen, keypad... **/
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class IO {
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// TODO…
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constructor (addressBus, dataBus, cpuWaitPin) {
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// ...
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}
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}
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```
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cardiograph.js:
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```
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// TODO: these might all need to be functions?
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let dataBus = 0;
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let addressBus = 0;
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let memoryReadSignal = 0;
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let memoryWriteSignal = 0;
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let cpuWait = 0;
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let rom = // TODO read in…
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let memory = new Memory(256, rom, addressBus, dataBus, memoryReadSignal, memoryWriteSignal);
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let cpu = new CPU(memory, addressBus, dataBus, memoryReadSignal, memoryWriteSignal, cpuWait);
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```
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Sketch is missing:
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- DMA stuff (IO)
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- actual instruction decoding/execution |