cardiograph-computer/2023-10-02.md

2023-10-02 — Dev notes

AVR Microcontrollers... from screenshot (with OCR errors):

In the tinyAVR and megaAVR variants of the AVR architecture, the working registers are mapped in as the first 32 data memory addresses (0000₁₆-001F₁₆, followed by 64 I/O registers

(002016-005F16). In devices with many peripherals, these registers are followed by 160 "extended I/O" registers, only accessible as memory-mapped 1/0 (006016-00FF16).

Actual SRAM starts after these register sections, at address 006016 or, in devices with "extended IO" at 010016

Even though there are separate addressing schemes and optimized opcodes for accessing the register file and the first 64 I/O registers, all can also be addressed and manipulated as if they were in SRAM.