6.9 KiB
2023-09-28 — Dev notes
https://stackoverflow.com/questions/3215878/what-are-in-out-instructions-in-x86-used-for#3215958
https://wiki.osdev.org/ATA_PIO_Mode
The disk that was selected last (by the BIOS, during boot) is supposed to maintain control of the electrical values on each IDE bus. If there is no disk connected to the bus at all, then the electrical values on the bus will all go "high" (to +5 volts). A computer will read this as an 0xFF byte -- this is a condition called a "floating" bus. This is an excellent way to find out if there are no drives on a bus. Before sending any data to the IO ports, read the Regular Status byte. The value 0xFF is an illegal status value, and indicates that the bus has no drives. … Measuring "float" is a shortcut for detecting that drives do not exist. Reading a non-0xFF value is not completely definitive. The definitive test for detecting drives is the #IDENTIFY command.
…
Status Register (I/O base + 7)
| Bit | Abbreviation | Function |
|---|---|---|
| 0 | ERR | Indicates an error occurred. Send a new command to clear it (or nuke it with a Software Reset). |
| 1 | IDX | Index. Always set to zero. |
| 2 | CORR | Corrected data. Always set to zero. |
| 3 | DRQ | Set when the drive has PIO data to transfer, or is ready to accept PIO data. |
| 4 | SRV | Overlapped Mode Service Request. |
| 5 | DF | Drive Fault Error (does not set ERR). |
| 6 | RDY | Bit is clear when drive is spun down, or after an error. Set otherwise. |
| 7 | BSY | Indicates the drive is preparing to send/receive data (wait for it to clear). In case of 'hang' (it never clears), do a software reset. |
https://www.sci.muni.cz/docs/pc/serport.txt
Q. Why does my PC have a 25pin/9pin connector if there are only 3 lines needed? A. There are several status lines that are only used with modems etc. See the Hardware section and the Registers section of this file.
http://inputoutput5822.weebly.com/programmed-io.html
! https://industrial-electronics.com/DAQ/comp-archi_16.html
It may seem that writing software to perform programmed I/O is trivial: a program merely assigns a value to an address on the bus. To understand I/O programming, however, we need to remember two things. First, a nonintelligent device cannot remember a list of commands. Instead, circuits in the device perform each command precisely when the processor sends the command. Second, a processor operates much faster than an I/O device - even a slow processor can execute thousands of instructions in the time it takes for a motor or mechanical actuator to move a physical mechanism. … To prevent problems, programmed I/O relies on synchronization. That is, once it issues a command, the processor must interact with the device to wait until the device is ready for another command.
We use the term Control and Status Registers (CSRs) to refer to the set of ad dresses that a device uses. More specifically, a control register corresponds to a contiguous set of addresses (usually the size of an integer) that respond to a store operation, and a status register corresponds to a contiguous set of addresses that respond to a fetch operation.
! https://en.wikipedia.org/wiki/History_of_computing_hardware_(1960s%E2%80%93present)
https://en.wikipedia.org/wiki/CDC_6600
The CP had no instructions for input and output, which are accomplished through Peripheral Processors (below).
CDC 6600 Simulation Model
- has ISA details
http://www.quadibloc.com/comp/cp0301.htm
https://detreville.substack.com/p/the-ibm-701
!!! https://amturing.acm.org/Buchholz_102636426.pdf
!! https://www.cambridgescholars.com/resources/pdfs/978-1-5275-0650-3-sample.pdf
[OCR from screenshot:]
The I/O system implemented five functions for using an I/O device:
Selecting an I/O unit for reading, writing, or a control operation, such as rewinding a tape on a magnetic tape drive.
Interlocking the selected I/O unit's operation with the execution of a program.
Copying data to/from the electrostatic storage unit and the I/0 units.
Synchronizing signals between the selected I/O unit and the CPU.
Disconnecting the I/O unit from control by the computer system its operation was completed.
Because the IBM 701 could continue to execute a program after it had selected an I/O unit, an interlock was implemented that "remembered" that the I/O unit had been selected for reading or writing. When the program encountered another select instruction, its execution was delayed until the operation on the previously selected I/O unit was completed. Information transferred to or from an I/O unit was always routed through the MQ register. These transfers occurred one word at a time and required the execution of a copy instruction on each transfer.
When a selected I/O unit was ready to transfer data, the program had to arrive at a copy instruction in order to perform the transfer. If no copy instruction was available, because the program had not reached the appropriate address, the I/O was disconnected from the computer and the interlock was turned off to prevent any information transfer.
https://homepage.divms.uiowa.edu/~jones/cards/collection/i-ballot.html
https://verifiedvoting.org/election-system/ess-votomatic/
https://en.m.wikipedia.org/wiki/IBM_1401
Some operations use specific memory locations (those locations are not reserved and can be used for other purposes). Read a card stores the 80 columns of data from a card into memory locations 001–080. Index registers 1, 2 and 3 are in memory locations 087–089, 092-094 and 097-099 respectively. Punch a card punches the contents of memory locations 101-180 into a card. Write a line prints the contents of memory locations 201–332.
https://www.multicians.org/thvv/1401s.html
http://www.righto.com/2021/02/an-ibm-1401-mainframe-computer-at.html?m=1