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Commit very old modifications to architecture spec

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n loewen 2025-02-28 10:51:02 +00:00
parent ae87a11ebb
commit dd2f801eb2
1 changed files with 7 additions and 6 deletions
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13
docs/architecture-specification.md
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@ -7,9 +7,10 @@
There are four 8-bit registers: There are four 8-bit registers:
1. **A**, the accumulator (and the only general-purpose register) 1. **A**, the accumulator (and the only general-purpose register)
2. **IP**, the instruction pointer (aka program counter) 2. **H**, an index register for 16-bit addressing
3. **IOD**, the ID of the current I/O device 3. **IP**, the instruction pointer (aka program counter)
3. **Status** 4. **IOD**, the ID of the current I/O device
5. **Status**
#### Status register #### Status register
@ -28,7 +29,7 @@ These are all addressed by number:*
|----|----|----|----|-|----|----|----|----| |----|----|----|----|-|----|----|----|----|
| 80 | 40 | 20 | 10 | | 08 | 04 | 02 | 01 | | 80 | 40 | 20 | 10 | | 08 | 04 | 02 | 01 |
* (Because the core instruction set doesn't include bitwise operations) \* (Because the core instruction set doesn't include bitwise operations)
### Instruction set ### Instruction set
@ -40,8 +41,8 @@ These are all addressed by number:*
| | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | | 8 | 9 | A | B | C | D | E | F | | | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | | 8 | 9 | A | B | C | D | E | F |
|-------|---------|---------|---------|---------|---------|---------|---------|---------|-|-----------|-----------|-----------|-----------|-----------|-----------|----------|-----------| |-------|---------|---------|---------|---------|---------|---------|---------|---------|-|-----------|-----------|-----------|-----------|-----------|-----------|----------|-----------|
| **0** | NOP | HLT | | | | | | | | | | | | | | | | | **0** | NOP | HLT | | | | | | | | | | | | | | | |
| **5** | LDA # | STA # | ADD # | SUB # | JMP # | HPE # | HPF # | TGF # | | _MUL #_ | _DIV #_ | _HLT #_ | _HGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ | | **5** | LDA # | STA # | ADD # | SUB # | JMP # | SEQ # | SFL # | TGF # | | _MUL #_ | _DIV #_ | _SLT #_ | _SGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ |
| **6** | LDA ind | STA ind | ADD ind | SUB ind | JMP ind | HPE ind | HPF ind | TGF ind | | _MUL ind_ | _DIV ind_ | _HLT ind_ | _HGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ | | **6** | LDA ind | STA ind | ADD ind | SUB ind | JMP ind | SEQ ind | SFL ind | TGF ind | | _MUL ind_ | _DIV ind_ | _SLT ind_ | _SGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ |
| **9** | DEV # | INP # | OUT # | NXT | | | | | | | | | | | | | | | **9** | DEV # | INP # | OUT # | NXT | | | | | | | | | | | | | |
| **A** | DEV ind | INP ind | OUT ind | NXT | | | | | | | | | | | | | | | **A** | DEV ind | INP ind | OUT ind | NXT | | | | | | | | | | | | | |
| **F** | _RSL A_ | _RSR A_ | _ASL A_ | _ASR A_ | | | | | | | | | | | | | | | **F** | _RSL A_ | _RSR A_ | _ASL A_ | _ASR A_ | | | | | | | | | | | | | |