From dd2f801eb2bb4ebf35872de08fb82e041528c020 Mon Sep 17 00:00:00 2001 From: n loewen Date: Fri, 28 Feb 2025 10:51:02 +0000 Subject: [PATCH] Commit very old modifications to architecture spec --- docs/architecture-specification.md | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/docs/architecture-specification.md b/docs/architecture-specification.md index efdcd1f..61bfb8e 100644 --- a/docs/architecture-specification.md +++ b/docs/architecture-specification.md @@ -7,9 +7,10 @@ There are four 8-bit registers: 1. **A**, the accumulator (and the only general-purpose register) -2. **IP**, the instruction pointer (aka program counter) -3. **IOD**, the ID of the current I/O device -3. **Status** +2. **H**, an index register for 16-bit addressing +3. **IP**, the instruction pointer (aka program counter) +4. **IOD**, the ID of the current I/O device +5. **Status** #### Status register @@ -28,7 +29,7 @@ These are all addressed by number:* |----|----|----|----|-|----|----|----|----| | 80 | 40 | 20 | 10 | | 08 | 04 | 02 | 01 | -* (Because the core instruction set doesn't include bitwise operations) +\* (Because the core instruction set doesn't include bitwise operations) ### Instruction set @@ -40,8 +41,8 @@ These are all addressed by number:* | | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | | 8 | 9 | A | B | C | D | E | F | |-------|---------|---------|---------|---------|---------|---------|---------|---------|-|-----------|-----------|-----------|-----------|-----------|-----------|----------|-----------| | **0** | NOP | HLT | | | | | | | | | | | | | | | | -| **5** | LDA # | STA # | ADD # | SUB # | JMP # | HPE # | HPF # | TGF # | | _MUL #_ | _DIV #_ | _HLT #_ | _HGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ | -| **6** | LDA ind | STA ind | ADD ind | SUB ind | JMP ind | HPE ind | HPF ind | TGF ind | | _MUL ind_ | _DIV ind_ | _HLT ind_ | _HGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ | +| **5** | LDA # | STA # | ADD # | SUB # | JMP # | SEQ # | SFL # | TGF # | | _MUL #_ | _DIV #_ | _SLT #_ | _SGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ | +| **6** | LDA ind | STA ind | ADD ind | SUB ind | JMP ind | SEQ ind | SFL ind | TGF ind | | _MUL ind_ | _DIV ind_ | _SLT ind_ | _SGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ | | **9** | DEV # | INP # | OUT # | NXT | | | | | | | | | | | | | | | **A** | DEV ind | INP ind | OUT ind | NXT | | | | | | | | | | | | | | | **F** | _RSL A_ | _RSR A_ | _ASL A_ | _ASR A_ | | | | | | | | | | | | | |