(notes) 2023-08-21 - Add section brainstorming a revised memory-map + initial Instruction Pointer
This commit is contained in:
parent
209a03f281
commit
efab770460
|
|
@ -6,15 +6,41 @@
|
||||||
- [x] graphics: 80 col card template
|
- [x] graphics: 80 col card template
|
||||||
- see below
|
- see below
|
||||||
- printing
|
- printing
|
||||||
- [ ] print: paper tape template
|
- [x] print: paper tape template
|
||||||
- [ ] print: colour coding forms
|
- [x] print: colour coding forms
|
||||||
- [ ] print: 80 col card template
|
- [x] print: 80 col card template
|
||||||
|
|
||||||
- [ ] see code/design commentary below...
|
- [ ] see code/design commentary below...
|
||||||
|
|
||||||
- (consider python (microbit) version of simulator)
|
- (consider python (microbit) version of simulator)
|
||||||
- maybe ask for e's input
|
- maybe ask for e's input
|
||||||
|
|
||||||
|
## Memory map re-think
|
||||||
|
|
||||||
|
### CPU start-up
|
||||||
|
|
||||||
|
When starting up, the CPU executes a `JMP $FF`.
|
||||||
|
|
||||||
|
Put differently: it starts executing instructions at the address contained in `$FF`.
|
||||||
|
|
||||||
|
### Cardiograph memory map
|
||||||
|
|
||||||
|
```
|
||||||
|
00-19 - display (5x5)
|
||||||
|
1A - pointer to display memory
|
||||||
|
1B - keypad: value of latest key pressed
|
||||||
|
1C - reserved for future use (bank switching flag)
|
||||||
|
1D-FE - free
|
||||||
|
```
|
||||||
|
|
||||||
|
## References re: where do CPU instruction pointers start, and how are they set?
|
||||||
|
|
||||||
|
- ["Memory Map Requirements", in *6502 PRIMER: Building your own 6502 computer*](http://wilsonminesco.com/6502primer/MemMapReqs.html)
|
||||||
|
- "Reset (RST): When the 6502's RST input gets pulled low and then brought back high, the 6502 starts its reset process, and gets the address to start executing program instructions from $FFFC-FFFD. Notice it does not start executing at address $FFFC, but reads it to get the beginning address of the routine where it should start executing. That routine will normally have to be in ROM."
|
||||||
|
- [What address does the x86 begin executing at?](https://stackoverflow.com/questions/4004493/what-address-does-the-x86-begin-executing-at)
|
||||||
|
- "The `cs` (code selector) register is set to `0xffff` and `ip` (instruction pointer) is set to `0x0000`."
|
||||||
|
- [Why is the first BIOS instruction located at 0xFFFFFFF0 ("top" of RAM)?](https://superuser.com/questions/988473/why-is-the-first-bios-instruction-located-at-0xfffffff0-top-of-ram) (x86)
|
||||||
|
|
||||||
## Imported notes from earlier
|
## Imported notes from earlier
|
||||||
|
|
||||||
### 2023-08-18 cardiograph loose thoughts
|
### 2023-08-18 cardiograph loose thoughts
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue