From af52d4f373bcc4d8da150ecf10116e2bf4927230 Mon Sep 17 00:00:00 2001 From: n loewen Date: Wed, 23 Aug 2023 14:47:38 +0100 Subject: [PATCH] (notes) - 2023-08-23 - Add a caveat about the current plan for the new ISA (requires 8-bit addressing) --- notes/2023-08-23--dev-notes.md | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/notes/2023-08-23--dev-notes.md b/notes/2023-08-23--dev-notes.md index 1009b89..f63f036 100644 --- a/notes/2023-08-23--dev-notes.md +++ b/notes/2023-08-23--dev-notes.md @@ -1,5 +1,13 @@ # Dev notes — 2023-08-23 +## Problems to solve + +The outline below / in the new README has some appeal, but it makes each instruction 8 bits long, which would require altering the simulator to support 8 bit addressing/storage... + +Do I want to do this?? + +Or maybe go with the simpler "just swap NOP and FHP" plan... + ## Instruction set layout notes ### Reference: 6502