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(docs) architecture - Change flags, new opcode table... these are changes from a month ago so idk if they're the right idea...

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n loewen 2023-10-23 19:00:27 -07:00
parent deae1be027
commit 9febe791c4
1 changed files with 20 additions and 17 deletions
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37
docs/architecture-specification.md
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@ -16,11 +16,15 @@ There are four 8-bit registers:
The *high byte* holds the state of the four Sense Switches. (TODO: is this easy enough to do in hardware?)
The *low byte* holds four flags:
**O**verflow, **N**egative, **Z**ero, and **C**arry.
- IO **E**rror
- **N**egative
- **Z**ero
- **C**arry
These are all addressed by number:*
| S1 | S2 | S3 | S4 | | O | N | Z | C |
| S1 | S2 | S3 | S4 | | E | N | Z | C |
|----|----|----|----|-|----|----|----|----|
| 80 | 40 | 20 | 10 | | 08 | 04 | 02 | 01 |
@ -33,14 +37,16 @@ These are all addressed by number:*
- Opcode format is ```GGMM OOOO``` — **G**roup, **M**ode, **O**peration
| | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | | 8 | 9 | A | B | C | D | E | F |
|-------|-----------|-----------|-----------|---------|---------|---------|---------|---------|---|-----------|-----------|-----------|-----------|-----------|-----------|----------|-----------|
| **0** | NOP | HLT | | | | | | | | | | | | | | | |
| **5** | LDA # | STO # | ADD # | SUB # | JMP # | JEQ # | JFL # | FTG # | | _MUL #_ | _DIV #_ | _JLT #_ | _JGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ |
| **6** | LDA ind | STO ind | ADD ind | SUB ind | JMP ind | JEQ ind | JFL ind | FTG ind | | _MUL ind_ | _DIV ind_ | _JLT ind_ | _JGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ |
| **9** | _DEV #_ | _INP #_ | _OUT #_ | _FED_ | | | | | | | | | | | | | |
| **A** | _DEV ind_ | _INP ind_ | _OUT ind_ | _FED_ | | | | | | | | | | | | | |
| **F** | _RSL A_ | _RSR A_ | _ASL A_ | _ASR A_ | | | | | | | | | | | | | |
| | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | | 8 | 9 | A | B | C | D | E | F |
|-------|---------|---------|---------|---------|---------|---------|---------|---------|-|-----------|-----------|-----------|-----------|-----------|-----------|----------|-----------|
| **0** | NOP | HLT | | | | | | | | | | | | | | | |
| **5** | LDA # | STA # | ADD # | SUB # | JMP # | HPE # | HPF # | TGF # | | _MUL #_ | _DIV #_ | _JLT #_ | _JGT #_ | _NOT #_ | _AND #_ | _OR #_ | _XOR #_ |
| **6** | LDA ind | STA ind | ADD ind | SUB ind | JMP ind | HPE ind | HPF ind | TGF ind | | _MUL ind_ | _DIV ind_ | _JLT ind_ | _JGT ind_ | _NOT ind_ | _AND ind_ | _OR ind_ | _XOR ind_ |
| **9** | DEV # | INP # | OUT # | NXT | | | | | | | | | | | | | |
| **A** | DEV ind | INP ind | OUT ind | NXT | | | | | | | | | | | | | |
| **F** | _RSL A_ | _RSR A_ | _ASL A_ | _ASR A_ | | | | | | | | | | | | | |
<mark>LDH, LDH, STH, STH</mark>
Operations in italics are extensions to the core set of operations.
@ -62,7 +68,7 @@ Brief legend for mnemonics:
- RSL/RSR: Ring Shift Left/Right
- JLT/JGT: Jump Less/Greater Than
- DEV: select IO device
- FED: "feed" - line feed / end of card
- NXT: "next" - move to next line / card
TODO: format/document better:
@ -97,12 +103,9 @@ TODO: format/document better:
| M/IO | out | |
### Start-up
### Start/Reset behaviour
<mark>TODO: see if this makes sense for the mainframe </mark>
When starting up, the CPU executes a `JMP $FF`.
Put differently: it starts executing instructions at the address contained in `$FF`.
When starting up, the CPU reads the program counter from $FF.
(Effectively executing a `JMP $FF`.)
<mark>TODO: currently the simulator doesn't actually do this</mark>