Add notes jotted down elsewhere over the last month
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n loewen
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@ -117,3 +117,5 @@ https://www.cs.drexel.edu/~bls96/oisc/
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- download manuals for decimal machines
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- + PDP
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- **aperture cards as slides**
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- [The Mystery of Claude Shannon’s Personal Computer](https://ieeexplore.ieee.org/stampPDF/getPDF.jsp?tp=&arnumber=9039960&ref=)
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# 2023-09-27 — Dev notes
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- Add `REW` rewind instruction for tape control?
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- (and `BSP` 'backspace'?)
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IBM 701 halts the machine and lights a 'checko
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IBM 701 (24-6042-1_701_PrincOps.pdf):
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If a copy instruction is given when there is no read-write component connected to the computing unit (e.g., fi nO READ Or WRITE instruction has been given, or fi a coPY has been given too late), the cal-
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culator stops and a copy-check light turns on, indi- cating an error in the program.
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# 2023-09-28 — Dev notes
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https://stackoverflow.com/questions/3215878/what-are-in-out-instructions-in-x86-used-for#3215958
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https://wiki.osdev.org/ATA_PIO_Mode
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> The disk that was selected last (by the BIOS, during boot) is supposed to maintain control of the electrical values on each IDE bus. If there is no disk connected to the bus at all, then the electrical values on the bus will all go "high" (to +5 volts). A computer will read this as an 0xFF byte -- this is a condition called a "floating" bus. This is an excellent way to find out if there are no drives on a bus. Before sending any data to the IO ports, read the Regular Status byte. The value 0xFF is an illegal status value, and indicates that the bus has no drives.
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> …
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> Measuring "float" is a shortcut for detecting that drives do not exist. Reading a non-0xFF value is not completely definitive. The definitive test for detecting drives is the #IDENTIFY command.
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…
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> Status Register (I/O base + 7)
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| Bit | Abbreviation | Function |
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|-----|--------------|-----------------------------------------------------------------------------------------------------------------------------------------|
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| 0 | ERR | Indicates an error occurred. Send a new command to clear it (or nuke it with a Software Reset). |
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| 1 | IDX | Index. Always set to zero. |
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| 2 | CORR | Corrected data. Always set to zero. |
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| 3 | DRQ | Set when the drive has PIO data to transfer, or is ready to accept PIO data. |
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| 4 | SRV | Overlapped Mode Service Request. |
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| 5 | DF | Drive Fault Error (does not set ERR). |
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| 6 | RDY | Bit is clear when drive is spun down, or after an error. Set otherwise. |
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| 7 | BSY | Indicates the drive is preparing to send/receive data (wait for it to clear). In case of 'hang' (it never clears), do a software reset. |
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https://www.sci.muni.cz/docs/pc/serport.txt
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> Q. Why does my PC have a 25pin/9pin connector if there are only 3 lines
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needed?
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A. There are several status lines that are only used with modems etc. See the
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Hardware section and the Registers section of this file.
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http://inputoutput5822.weebly.com/programmed-io.html
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! https://industrial-electronics.com/DAQ/comp-archi_16.html
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> It may seem that writing software to perform programmed I/O is trivial: a program merely assigns a value to an address on the bus. To understand I/O programming, however, we need to remember two things. First, a nonintelligent device cannot remember a list of commands. Instead, circuits in the device perform each command precisely when the processor sends the command. Second, a processor operates much faster than an I/O device - even a slow processor can execute thousands of instructions in the time it takes for a motor or mechanical actuator to move a physical mechanism.
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> …
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> To prevent problems, programmed I/O relies on synchronization. That is, once it issues a command, the processor must interact with the device to wait until the device is ready for another command.
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> We use the term Control and Status Registers (CSRs) to refer to the set of ad dresses that a device uses. More specifically, a control register corresponds to a contiguous set of addresses (usually the size of an integer) that respond to a store operation, and a status register corresponds to a contiguous set of addresses that respond to a fetch operation.
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! https://en.wikipedia.org/wiki/History_of_computing_hardware_(1960s%E2%80%93present)
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https://en.wikipedia.org/wiki/CDC_6600
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> The CP had no instructions for input and output, which are accomplished through Peripheral Processors (below).
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CDC 6600 Simulation Model
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- has ISA details
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http://www.quadibloc.com/comp/cp0301.htm
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https://detreville.substack.com/p/the-ibm-701
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!!! https://amturing.acm.org/Buchholz_102636426.pdf
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!! https://www.cambridgescholars.com/resources/pdfs/978-1-5275-0650-3-sample.pdf
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> [OCR from screenshot:]
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>
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> The I/O system implemented five functions for using an I/O device:
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>
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> 1. Selecting an I/O unit for reading, writing, or a control operation, such as rewinding a tape on a magnetic tape drive.
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>
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> 2. Interlocking the selected I/O unit's operation with the execution of a program.
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>
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> 3. Copying data to/from the electrostatic storage unit and the I/0 units.
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>
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> 4. Synchronizing signals between the selected I/O unit and the CPU.
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>
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> 5. Disconnecting the I/O unit from control by the computer system its operation was completed.
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>
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> Because the IBM 701 could continue to execute a program after it had selected an I/O unit, an interlock was implemented that "remembered" that the I/O unit had been selected for reading or writing. When the program encountered another select instruction, its execution was delayed until the operation on the previously selected I/O unit was completed. Information transferred to or from an I/O unit was always routed through the MQ register. These transfers occurred one word at a time and required the execution of a copy instruction on each transfer.
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>
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> When a selected I/O unit was ready to transfer data, the program had to arrive at a copy instruction in order to perform the transfer. If no copy instruction was available, because the program had not reached the appropriate address, the I/O was disconnected from the computer and the interlock was turned off to prevent any information transfer.
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***
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https://retrocomputing.stackexchange.com/questions/27756/how-late-were-80-column-punched-cards-relevant
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https://homepage.divms.uiowa.edu/~jones/cards/collection/i-ballot.html
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https://verifiedvoting.org/election-system/ess-votomatic/
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https://retrocomputing.stackexchange.com/questions/19686/how-were-card-sequence-numbers-typically-checked
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https://en.m.wikipedia.org/wiki/IBM_1401
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> Some operations use specific memory locations (those locations are not reserved and can be used for other purposes). Read a card stores the 80 columns of data from a card into memory locations 001–080. Index registers 1, 2 and 3 are in memory locations 087–089, 092-094 and 097-099 respectively. Punch a card punches the contents of memory locations 101-180 into a card. Write a line prints the contents of memory locations 201–332.
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https://www.multicians.org/thvv/1401s.html
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http://www.righto.com/2021/02/an-ibm-1401-mainframe-computer-at.html?m=1
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@ -0,0 +1,7 @@
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# 2023-09-29 — Dev notes
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## Games that teach assembly (and related material)
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- [PROJEKT: OVERFLOW: RISC-V assembly board game](https://punkx.org/overflow/)
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- [comments on Hacker News](https://news.ycombinator.com/item?id=37704760)
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- [Machine Code is for Kids!](https://www.gamesindustry.biz/machine-code-is-for-kids-article) ("Dylan Cuthbert on why machine code is perfect for kids to learn programming")
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@ -0,0 +1,28 @@
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# 2023-09-30 — Dev notes
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## ipad cardiograph links - 2023-09-30ish
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### Toy RISC machines
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- [GitHub - meetdoshi90/8-Bit-RISC-Microprocessor: An 8-bit RISC based processor designed in verilog with x86 instructions.](https://github.com/meetdoshi90/8-Bit-RISC-Microprocessor)
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- [GitHub - olofk/serv: SERV - The SErial RISC-V CPU](https://github.com/olofk/serv)
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- [GitHub - NayanaBannur/8-bit-RISC-Processor: A Verilog RTL model of a simple 8-bit RISC processor](https://github.com/NayanaBannur/8-bit-RISC-Processor)
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- [GitHub - NayanaBannur/8-bit-RISC-Processor: A Verilog RTL model of a simple 8-bit RISC processor](https://github.com/TeamCM/Atom-Fluorine)
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- [GitHub - AnkurRyder/8085-Processor: 8-bit RISC Processor on Logisim](https://github.com/AnkurRyder/8085-Processor)
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- [natalius_8bit_risc/doc/Natalius 8 bit RISC Processor.pdf at master · freecores/natalius_8bit_risc · GitHub](https://github.com/freecores/natalius_8bit_risc/blob/master/doc/Natalius%208%20bit%20RISC%20Processor.pdf)
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- [Amber 2 Core Specification](https://opencores.org/websvn/filedetails?repname=amber&path=%2Famber%2Ftrunk%2Fdoc%2Famber-core.pdf#page14) (PDF)
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### MIPS
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- [GitHub - GabrielGiurgica/8-bit-MIPS-Processor: A Verilog implementation of an 8-bit MIPS processor](https://github.com/GabrielGiurgica/8-bit-MIPS-Processor0
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- [MIPS Reference Sheet](https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdf#page14)
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- [MIPS Assembly/Instruction Formats](https://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formats)
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- [GitHub - exallium/pyvm: 8-bit RISC Assembler and VM](https://github.com/exallium/pyvm)
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### Assemblers
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- [Simple 8-bit Assembler Simulator](https://schweigi.github.io/assembler-simulator/)
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- [Make your own Assembler simulator in JavaScript (Part 1)](https://www.mschweighauser.com/make-your-own-assembler-simulator-in-javascript-part1/)
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- [Simple 8-bit Assembler - Instruction Set Help](https://schweigi.github.io/assembler-simulator/instruction-set.html)
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# 2023-10-01 — Dev notes
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i like the compare and branch setup here: https://schweigi.github.io/assembler-simulator/instruction-set.html
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## A very incomplete survey of 8-bit RISC machines
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- https://github.com/NayanaBannur/8-bit-RISC-Processor
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- https://kevinpt.github.io/opbasm/rst/tutorial.html
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- https://www.allaboutcircuits.com/ip-cores/processor/open8-urisc/
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- https://opencores.org/projects/natalius_8bit_risc
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- https://hackaday.io/project/28042-phx8-homebrew-8bit-risc-cpu
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- https://shubham1172.github.io/SRM/
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## Simple-As-Possible computer
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- [Simple-As-Possible computer - Wikipedia](https://en.wikipedia.org/wiki/Simple-As-Possible_computer)
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- http://aserrano.es/portafolio/informatica-con-processing/sap1english/
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## ?? ADC
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maybe swap add for adc — you can always manually zero the flag
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## flags
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i do wonder if they should be done in a more conventional way
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# 2023-10-02 — Dev notes
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[AVR Microcontrollers](https://en.wikipedia.org/wiki/AVR_microcontrollers)... from screenshot (with OCR errors):
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> In the tinyAVR and megaAVR variants of the AVR architecture, the working registers are mapped in as the first 32 data memory addresses (0000<sub>16</sub>-001F<sub>16</sub>, followed by 64 I/O registers
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>
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> (002016-005F16). In devices with many peripherals, these registers are followed by 160 "extended I/O" registers, only accessible as memory-mapped 1/0 (006016-00FF16).
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>
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> Actual SRAM starts after these register sections, at address 006016 or, in devices with "extended IO" at 010016
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>
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> Even though there are separate addressing schemes and optimized opcodes for accessing the register file and the first 64 I/O registers, all can also be addressed and manipulated as if they were in SRAM.
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# 2023-10-14 — Dev notes
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https://en.wikipedia.org/wiki/Tape-out
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Comment by "Stratoscope" on ["Examining the silicon dies of the Intel 386 processor"](https://news.ycombinator.com/item?id=37886065):
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> Great article as always! One nit:
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>
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> > ..."tapeout", when the chip data is sent on magnetic tape to the mask fabrication company.
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>
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> That's roughly true in a temporal sense, but it's not where the term "tapeout" comes from. They could have shipped the data on a Winchester disk, and the event would still be called tapeout.
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>
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> In the earlier days of printed circuit board (PCB) manufacturing, you would literally "tape out" your circuit manually with black tape on a white board, typically in an enlarged form.
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>
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> "Tapeout" came to mean the point in time when you finished taping out your circuit and it was ready to be sent to be photographed and reduced and boards manufactured from the layout.
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>
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> There wasn't even any "data" involved here, magnetic or otherwise. Just a physical art board with tape on it.
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>
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> Wikipedia has a pretty good article on this:
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>
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> https://en.wikipedia.org/wiki/Tape-out
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>
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> And for the young'uns who are wondering "what the heck is a Winchester disk?"
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>
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> https://www.pcmag.com/encyclopedia/term/winchester-disk
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>
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> I taped out my first printed circuit board as a third-grader sometime around 1960 and shared the story here:
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>
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> https://news.ycombinator.com/item?id=32116169
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# 2023-10-23 — Dev notes
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## Recent links
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### DCPU-16
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https://gist.githubusercontent.com/metaphox/3888117/raw/588a5f1fc24a67cb14939deab588fbff29b7e2aa/DCPU-16Spec.txt
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https://fail0verflow.com/blog/2012/dcpu-16-review/
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failoverflow’s redesign: https://fail0verflow.com/media/files/dcpu16-proposal.txt
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networking: https://github.com/ManuelKiessling/dcpu16-networkhub#readme
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### Book
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https://www.amazon.ca/Computer-Organization-Design-MIPS-Interface/dp/0124077269
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## Computer Confidence: A Woman’s Guide
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https://archive.org/details/computerconfiden0000hell/page/n5/mode/1up?view=theater
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### Misc.
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- http://www.quadibloc.com/comp/cardint.htm
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- http://www.quadibloc.com/comp/panint.htm
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- http://www.quadibloc.com/arch/arcint.htm
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- http://www.quadibloc.com/comp/lineint.htm
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## Z80
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- https://clrhome.org/table/
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## System/360 Front Panels
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- http://www.righto.com/2019/04/iconic-consoles-of-ibm-system360.html?m=1
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### BEFLIX
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- [Using his BEFLIX Computer Animation Language, Ken Knowlton Produces "A Computer Technique for the Production of Animated Movies”](https://historyofinformation.com/detail.php?id=3467)
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