Add notes for 2023-08-30 and 31

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n loewen 2023-08-31 21:08:14 -04:00
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# Dev notes — 2023-08-30
- more IO? brainstorming…
- input byte - could be used for loading from tape, …
- maybe something like: you set $f0 to 1, then the io controller checks for that 1, and if it sees it, it loads a byte into $f1 and sets $f0 back to 0
- output byte - could be used for printing to a printer; controlling a robot turtle…
- interrupts?
- for keypad
- how do they work on KIM 1 (6502) and VIP (1802, Chip 8)?
- chip8 doesnt have interrupts; just “skip if key (not) pressed”
- CHIP-8 virtual machine specification
- probably/maybe requires new instructions?
- sth like: current IP is stashed at $fd; JMP ($fe) to keypad interrupt routine; jmp ($fd) to return when done ?
https://en.wikipedia.org/wiki/RCA_1802#DMA_and_load_mode:
> The CDP1802 has a simple built-in DMA controller, having two DMA request lines for DMA input and output. The CPU only accesses memory during certain cycles of the multi-step machine cycle, which required between 8 and 16 clock cycles. External hardware could read or write data during these periods without interrupting the processor, a general concept known as cycle stealing.
>
> R0 is used as the DMA address pointer. The starting address of the DMA data would be put in R0 and then pulling the appropriate read or write pin on the CPU low. The CPU responded to the DMA request by incrementing the value in R0, so that the next request automatically stored in the next location in memory. Thus by simply repeatedly triggering the DMA pins, the system would walk through the entire memory.
>
> The DMA controller also provides a special "load mode", which allows loading of memory while the CLEAR and WAIT inputs of the processor are active. This allows a program to be loaded without the need for a ROM-based bootstrap loader. This was used by the COSMAC Elf microcomputer and its successors to load a program from toggle switches or a hexadecimal keypad with no required software and minimal hardware. The user could simply set the switches to the next value, toggle the read, and then move on. There was no need to change the addresses, that was done automatically by the DMA stepping.
***
VIP manual
- looks like no keyboard interrupts
- see pp 22-25

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# Dev notes — 2023-08-31
- [ ] parse args in a safer way
- [ ] implement missing features
- [ ] single-stepping
- [ ] various levels of debugging, pretty-printing
- [ ] add 'dry run' mode to assembler - print debug info but don't write to file
- [ ] implement 'jmp ($FF)' on startup
- [ ] implement ROM
## Microprocessor trainer style keypad
### New keys
I'm thinking the system needs:
1. on/off switch
2. 'shift' key
3. hex keypad
The 'shift' key allows each of the keypad keys to have two functions:
`1 / + ` `2 ` `3 ` `C / ST`
`4 ` `5 ` `6 ` `D `
`7 / DA` `8 ` `9 ` `E / G1`
`A / AD` `0 ` `B ` `F / GO`
(These are based on the KIM-1 buttons)
- Updating and viewing memory:
- `AD` `n` `n` — go to address *nn*
- `DA` `n` `n` store data at address *nn*
- `+` go to next address
- Running programs:
- `GO` run, starting at current address
- `G1` execute next instruction (single-step)
- `ST` — stop running
`D` could be a reset key, but I'm not sure it's necessary?
#### Usage: inspecting memory
1. Press `AD` to switch to address-entry mode
2. Enter the address you want to inspect with `n` `n`
3. Press `+` to move to the next address
#### Usage: entering code
1. Press `AD` to switch to address-entry mode
2. Enter the starting address with `n` `n`
3. Press `DA` to switch to data-entry mode
4. Enter the data with `n` `n`
5. The system automatically advances to the next address; just keep entering data
#### Usage: running code
Running continuously:
- Press `GO` to begin continuous execution
- Press `ST` to stop execution
Single-stepping:
- (Press `ST` to stop execution)
- Press `G1` to execute one instruction
### To consider
- If I understand/remember correctly... When the `ST` button is pressed on the KIM-1, the values in the registers are copied into ram so that they can be inspected
- That seems like a good idea
### Handling
I think this is all handled by the I/O controller (or a new DMA controller?) — not the CPU, at any rate
> The DMA controller also provides a special "load mode", which allows loading of memory while the CLEAR and WAIT inputs of the processor are active. This allows a program to be loaded without the need for a ROM-based bootstrap loader. This was used by the COSMAC Elf microcomputer and its successors to load a program from toggle switches or a hexadecimal keypad with no required software and minimal hardware. The user could simply set the switches to the next value, toggle the read, and then move on. There was no need to change the addresses, that was done automatically by the DMA stepping.
 https://en.wikipedia.org/wiki/RCA_1802
### Displaying data, microprocessor trainer style
The Cardiograph's signature 5x5 display makes this a challenge. I have two ideas:
1 — Display data in binary, with one nibble per line. You can fit two bytes on screen with a space in between.
○ ● ● ● ● F
○ ● ○ ● ○ A
○ ○ ○ ○ ○
○ ○ ● ○ ● 5
○ ● ○ ● ○ A
2  Display data using a sort of abacus-esque encoding...
8s, 4s ... 3 2 1
○ ○ ○ ○ ○ 0
○ ○ ○ ○ ● 1
○ ○ ○ ● ○ 2
○ ○ ● ○ ○ 3
○ ● ○ ○ ○ 4
○ ● ○ ○ ● 5
○ ● ○ ● ○ 6
○ ● ● ○ ○ 7
● ○ ○ ○ ○ 8
● ○ ○ ○ ● 9
● ○ ○ ● ○ A
● ○ ● ○ ○ B
● ● ○ ○ ○ C
● ● ○ ○ ● D
● ● ○ ● ○ E
● ● ● ○ ○ F
or
○ ○ ○ ○ ○ 0
○ ○ ○ ○ ● 1
○ ○ ○ ● ● 2
○ ○ ● ● ● 3
○ ● ● ● ● 4
○ ● ○ ○ ● 5 = 4 + 1
○ ● ○ ● ● 6 = 4 + 2
○ ● ● ● ● 7 = 4 + 3
● ○ ○ ○ ○ 8
● ○ ○ ○ ● 9 = 8 + 1
● ○ ○ ● ● A = 8 + 2
● ○ ● ● ● B = 8 + 3
● ● ○ ○ ○ C = 8 + 4
● ● ○ ○ ● D = 8 + 4 + 1
● ● ○ ● ● E = 8 + 4 + 2
● ● ● ● ● F = 8 + 4 + 3
the first is maybe clearer as an encoding; more elegant
but mayber the second is easier to quickly read off of an LED display?
## From apple notes — "cardiograph 2023-09-31"
- [ ] interrupts…
- [ ] for extended system? (“cardiograph+”?)
- [ ] how does a big iron machine like a pdp, burroughs, system/360 load program?
- [ ] what are the buttons for memory access on a microprocessor trainer like a kim-1, cosmac?
“Typically, a microprocessor will, after a reset or power-on condition, perform a start-up process that usually takes the form of "begin execution of the code that is found starting at a specific address" or "look for a multibyte code at a specific address and jump to the indicated location to begin execution". A system built using that microprocessor will have the permanent ROM occupying these special locations so that the system always begins operating without operator assistance. For example, Intel x86 processors always start by running the instructions beginning at F000:FFF0,[46][47] while for the MOS 6502 processor, initialization begins by reading a two-byte vector address at $FFFD (MS byte) and $FFFC (LS byte) and jumping to that location to run the bootstrap code.[48]”
→ so i could just have a ROM
→ or maybe two possible configurations? because sth more Cosmac-like or Big Iron-like would be fun too